The invention relates to a circuit arrangement for a television receiver comprising a television signal decoder, this decoder deriving from the television signal applied to its input the luminance signal supplied by a luminance signal output via a low-pass filter arrangement for suppressing the chrominance signal, and comprising a video text decoder producing signals from the video text data from which driving signals for a picture display device can be derived.
Such a circuit arrangement is disclosed in the Valvo publication "Technische Informationen fur die Industrie 80 04 07" entitled "Videotext und Bildschirmtext mit den LSI-Schaltungen SAA 5020, SAA 5030, SAA 5041 und SAA 5051". In this publication the television signal is applied to the video text decoder and the television signal decoder for deriving signals from which driving signals for the picture tube can be derived.
The video text data are transferred in the television signal during the vertical blanking intervals of the television picture in the lines 17, 18 and 330, 331. By means of the video text decoder in the television receiver the video text information is taken from the television signal, processed and displayed on the screen of the picture tube by means of alphanumeric and graphical symbols. The video text information is suitable for transmitting messages and subtitling, for example.
Practice has shown that there is an unacceptable shift between the inserted video text (picture subtitling) and the picture itself when the television signal decoder is designed as a digital processor. The television picture and the subtitling do not synchronize. The shift should then be compensated for by delay elements.